The present disclosure relates to semiconductor memory devices, and more particularly to a nonvolatile semiconductor memory device including a variable resistance memory element, for example.
Semiconductor memory devices include volatile memories that require a power supply to retain data, and nonvolatile memories that do not require a power supply. Examples of nonvolatile memories include flash memories, and resistive random access memories (ReRAMs) that have recently been being developed. Predominant nonvolatile memories are currently flash memories, and in a flash memory, the time during which data are rewritten is in the order of microseconds or milliseconds, and a rewrite operation is performed by using a voltage higher than or equal to 10 V. In contrast, in a ReRAM including a variable resistance memory element, the time during which data are rewritten is in the order of nanoseconds, and a rewrite operation can be performed by using a voltage of about 1.8 V. Thus, the ReRAM allows the speed of the rewrite operation to be higher than the flash memory, and allows the power consumed by the rewrite operation to be lower than the flash memory.
Examples of memory cells of the ReRAM include 1T1R-type memory cells illustrated in FIG. 17A, and cross-point memory cells illustrated in FIG. 17B. The 1T1R-type memory cells illustrated in FIG. 17A include unipolar memory cells and bipolar memory cells. Pulses of the same polarity are applied to a unipolar memory cell both to write data into a variable resistance memory element and to erase data from the variable resistance memory element. For example, as illustrated in FIG. 18A, a source line is fixed at the ground potential, a rewrite pulse is applied through a bit line to a unipolar memory cell, and the applied voltage is adjusted to write data into the memory cell, or erase data from the memory cell.
In contrast, the polarity of a pulse applied to a bipolar memory cell to write data into a variable resistance memory element is opposite to that of a pulse applied thereto to erase data from the variable resistance memory element. For example, as illustrated in FIG. 18B, to write data into a bipolar memory cell, a bit line is fixed at the ground potential, and a pulse is applied through a source line to the memory cell. To erase data from the bipolar memory cell, the source line is fixed at the ground potential, and a pulse is applied through the bit line to the memory cell. As such, the direction of the pulse applied to the memory cell and the applied voltage are controlled to write data into the memory cell, or erase data from the memory cell.
When voltages are applied to memory cells to write data into the memory cells or erase data from the memory cells, equal voltages need to be applied to the memory cells independently of the locations of the memory cells in a memory cell array. Thus, bit lines have conventionally been grounded through a discharge circuit outside a memory cell array to apply voltages to memory cells (see, for example, Japanese Unexamined Patent Publication No. H10-064292).